Power Systems for modern CMOS technology are becoming harder to design. One design methodology is to identify a target impedance to be met across a broad frequency range and specify components to meet that impedance. The impedance vs. frequency profiles of the power distribution system components including the voltage regulator module, bulk decoupling capacitors and high frequency ceramic capacitors are defined and reduced to spice models. A sufficient number of capacitors are placed in parallel to meet the target impedance. Ceramic capacitor ESR and ESL are extremely important parameters in determining how many capacitors are required. Spice models are then analyzed in the time domain to find the response to load transients.
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